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INTEGRATED CIRCUITS
DATA SHEET
TDA8702 8-bit video digital-to-analog converter
Product specification Supersedes data of April 1993 File under Integrated Circuits, IC02 1996 Aug 23
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
FEATURES * 8-bit resolution * Conversion rate up to 30 MHz * TTL input levels * Internal reference voltage generator * Two complementary analog voltage outputs * No deglitching circuit required * Internal input register * Low power dissipation * Internal 75 output load (connected to the analog supply) * Very few external components required. GENERAL DESCRIPTION APPLICATIONS
TDA8702
* High-speed digital-to-analog conversion * Digital TV including: - field progressive scan - line progressive scan * Subscriber TV decoders * Satellite TV decoders * Digital VCRs.
The TDA8702 is an 8-bit Digital-to-Analog Converter (DAC) for video and other applications. It converts the digital input signal into an analog voltage output at a maximum conversion rate of 30 MHz. No external reference voltage is required and all digital inputs are TTL compatible.
QUICK REFERENCE DATA SYMBOL VCCA VCCD ICCA ICCD VOUT - VOUT PARAMETER analog supply voltage digital supply voltage analog supply current digital supply current full-scale analog output voltage (peak-to-peak value) note 1 note 1 note 2 ZL = 10 k ZL = 75 k ILE DLE fCLK B Ptot Note 1. D0 to D7 connected to VCCD and CLK connected to DGND. 2. The analog output voltages (VOUT and VOUT) are negative with respect to VCCA (see Table 1). The output resistance between VCCA and each of these outputs is typically 75 . 3. The -3 dB analog output bandwidth is determined by real time analysis of the output transient at a maximum input code transition (code 0 to 255). DC integral linearity error DC differential linearity error maximum conversion rate -3 dB analog bandwidth total power dissipation fCLK = 30 MHz; note 3 -1.45 -0.72 - - - - - -1.60 -0.80 - - - 150 250 -1.75 -0.88 1/2 1/2 30 - 340 V V LSB LSB MHz MHz mW CONDITIONS MIN. 4.5 4.5 - - TYP. 5.0 5.0 26 23 MAX. 5.5 5.5 32 30 UNIT V V mA mA
1996 Aug 23
2
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
ORDERING INFORMATION TYPE NUMBER TDA8702 TDA8702T BLOCK DIAGRAM PACKAGE NAME DIP16 SO16 DESCRIPTION plastic dual in-line package; 16 leads (300 mil); long body plastic small outline package; 16 leads; body width 7.5 mm
TDA8702
VERSION SOT38-1 SOT162-1
handbook, full pagewidth
REF 100 nF
1 BAND-GAP REFERENCE CURRENT REFERENCE LOOP
DGND AGND
6 2 CURRENT GENERATORS 75 5 CLOCK INPUT INTERFACE CURRENT SWITCHES
16 75 15 14
VCCA
CLK
VOUT VOUT
TDA8702/ TDA8702T
12 11 3 4 10 9 8 7
REGISTERS
13
(LSB) D0 D1 D2 D3 D4 D5 D6 (MSB) D7
VCCD
DATA INPUT INTERFACE
MSA659
Fig.1 Block diagram.
1996 Aug 23
3
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
PINNING SYMBOL PIN REF AGND D2 D3 CLK DGND D7 D6 D5 D4 D1 D0 VCCD VOUT VOUT VCCA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 DESCRIPTION voltage reference (decoupling) analog ground data input; bit 2 data input; bit 3 clock input digital ground data input; bit 7 data input; bit 6 data input; bit 5 data input; bit 4 data input; bit 1 data input; bit 0 positive supply voltage for digital circuits (+5 V) analog voltage output complementary analog voltage output positive supply voltage for analog circuits (+5 V) Fig.2 Pin configuration.
D6 8
MSA658
TDA8702
handbook, halfpage
REF AGND D2 D3 CLK DGND D7
1 2 3 4 5 6 7
16 V CCA 15 V OUT 14 V OUT
TDA8702/ TDA8702T 12 D0
11 D1 10 9 D4 D5
13 V CCD
1996 Aug 23
4
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCCA VCCD VCCA - VCCD AGND - DGND VI IOUT/IOUT Tstg Tamb Tj HANDLING analog supply voltage digital supply voltage supply voltage differential ground voltage differential input voltage (pins 3 to 5 and 7 to 12) total output current (pins 14 and 15) storage temperature operating ambient temperature junction temperature PARAMETER MIN. -0.3 -0.3 -0.5 -0.1 -0.3 -5 -55 0 -
TDA8702
MAX. +7.0 +7.0 +0.5 +0.1 VCCD +26 +150 +70 +125 V V V V V
UNIT
mA C C C
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL RESISTANCE SYMBOL Rth j-a SOT38-1 SOT162-1 PARAMETER from junction to ambient in free air 70 90 K/W K/W VALUE UNIT
1996 Aug 23
5
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
CHARACTERISTICS VCCA = V16 - V2 = 4.5 V to 5.5 V; VCCD = V13 - V6 = 4.5 V to 5.5 V; VCCA - VCCD = -0.5 V to +0.5 V; VREF decoupled to AGND by a 100 nF capacitor; Tamb = 0 C to +70 C; AGND and DGND shorted together; unless otherwise specified (typical values measured at VCCA = VCCD = 5 V and Tamb = 25 C). SYMBOL Supply VCCA VCCD ICCA ICCD Inputs DIGITAL INPUTS (D7 TO D0) AND CLOCK INPUT (CLK) VIL VIH IIL IIH fCLK VOUT - VOUT VOS VOUT/TC VOS/TC B Gdiff diff ZO LOW level input voltage HIGH level input voltage LOW level input current HIGH level input current maximum clock frequency VI = 0.4 V VI = 2.7 V 0 2.0 - - - -1.45 -0.72 - - - note 3; fCLK = 30 MHz - - - - - - - - -0.3 0.01 - -1.60 -0.80 -3 - - 150 0.6 1 75 - - 0.8 VCCD -0.4 20 30 -1.75 -0.88 -25 200 20 - - - - 1/2 1/2 V V mA A MHz analog supply voltage digital supply voltage analog supply current digital supply current note 1 note 1 4.5 4.5 - - -0.1 5.0 5.0 26 23 - 5.5 5.5 32 30 +0.1 V V mA mA V PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
AGND - DGND ground voltage differential
Outputs (note 2; referenced to VCCA) full-scale analog output voltages (peak-to-peak value) analog offset output voltage full-scale analog output voltage temperature coefficient analog offset output voltage temperature coefficient -3 dB analog bandwidth differential gain differential phase output impedance ZL = 10 k ZL = 75 code = 0 V V mV V/K V/K MHz % deg
Transfer function (fCLK = 30 MHz) ILE DLE DC integral linearity error DC differential linearity error LSB LSB
1996 Aug 23
6
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Switching characteristics (fCLK = 30 MHz); notes 4 and 5; see Figs 3, 4 and 5 tSU;DAT tHD;DAT tPD tS1 tS2 td data set-up time data hold time propagation delay time settling time settling time input to 50% output delay time 10% to 90% full-scale change to 1 LSB 10% to 90% full-scale change to 1 LSB -0.3 2.0 - - - - - - - - 1.1 6.5 3.0 - - - 1.0 1.5 8.0 5.0 ns ns ns ns ns ns
Output transients (glitches; (fCLK = 30 MHz); note 6; see Fig.6 Eg Note 1. D0 to D7 are connected to VCCD, CLK is connected to DGND. 2. The analog output voltages (VOUT and VOUT are negative with respect to VCCA (see Table 1). The output resistance between VCCA and each of these outputs is 75 (typ.). 3. The -3 dB analog output bandwidth is determined by real time analysis of the output transient at a maximum input code transition (code 0 to 255). 4. The worst case characteristics are obtained at the transition from input code 0 to 255 and if an external load impedance greater than 75 is connected between VOUT or VOUT and VCCA. The specified values have been measured with an active probe between VOUT and AGND. No further load impedance between VOUT and AGND has been applied. All input data is latched at the rising edge of the clock. The output voltage remains stable (independent of input data variations) during the HIGH level of the clock (CLK = HIGH). During a LOW-to-HIGH transition of the clock (CLK = LOW), the DAC operates in the transparent mode (input data will be directly transferred to their corresponding analog output voltages (see Fig.5). 5. The data set-up (tSU;DAT) is the minimum period preceding the rising edge of the clock that the input data must be stable in order to be correctly registered. A negative set-up time indicates that the data may be initiated after the rising edge of the clock and still be recognized. The data hold time (tHD;DAT) is the minimum period following the rising edge of the clock that the input data must be stable in order to be correctly registered. A negative hold time indicates that the data may be released prior to the rising edge of the clock and still be recognized. 6. The definition of glitch energy and the measurement set-up are shown in Fig.6. The glitch energy is measured at the input transition between code 127 to 128 and on the falling edge of the clock. glitch energy from code transition 127 to 128 30 LSB.ns
1996 Aug 23
7
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
Table 1
TDA8702
Input coding and output voltages (typical values; referenced to VCCA, regardless of the offset voltage) DAC OUTPUT VOLTAGES INPUT DATA (D7 TO D0) VOUT 000 00 00 000 000 01 ........ 100 000 00 ........ 111 111 10 111 111 11 -1.594 -1.6 -0.006 0 -0.797 -0.8 -0.003 0 -0.8 -0.8 -0.4 -0.4 0 -0.006
CODE
ZL = 10 K VOUT -1.6 -1.594 VOUT 0 -0.003
ZL = 75 VOUT -0.8 -0.797
0 1 . 128 . 254 255
handbook, full pagewidth
t SU; DAT
t HD; DAT 3.0 V
input data
stable
1.3 V 0V
3.0 V CLK
MBC912
1.3 V 0V
The shaded areas indicate when the input data may change and be correctly registered. Data input update must be completed within 0.3 ns after the first rising edge of the clock (tSU;DAT is negative; -0.3 ns). Data must be held at least 2 ns after the rising edge (tHD;DAT = +2 ns).
Fig.3 Data set-up and hold times.
1996 Aug 23
8
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
handbook, full pagewidth
CLK
1.3 V
code 255 input data (example of a full-scale input transition) code 0 1.3 V 1 LSB VCCA (code 0) 10 %
td
50 %
VOUT
90 % VCCA 1.6 V (code 255) t S1 t PD t S2 1 LSB
MBC913
Fig.4 Switching characteristics.
handbook, full pagewidth
CLK
transparent mode
latched mode
1.3 V
input codes
V OUT analog output voltage
MBC914 - 1
transparent mode
latched mode (stable output)
beginning of transparent mode
During the transparent mode (CLK = LOW), any change of input data will be seen at the output. During the latched mode (CLK = HIGH), the analog output remains stable regardless of any change at the input. A change of input data during the latched mode will be seen on the falling edge of the clock (beginning of the transparent mode).
Fig.5 Latched and transparent mode.
1996 Aug 23
9
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
handbook, full pagewidth
HP8082A PULSE GENERATOR (SLAVE)
f CLK/10
(2)
TEK P6201 D7 MSB D6 D5 D4 D3 D2 D1 D0 (LSB) f CLK 3 clock VOUT VOUT DYNAMIC PROBE R = 100 k C = 3 pF
TEK7104 and TEK7A26 OSCILLOSCOPE bandwidth = 20 MHz
HP8082A
PULSE GENERATOR (SLAVE)
f CLK/10
(1)
TDA8702/ TDA8702T
DIVIDER ( 10)
f CLK
(3)
PULSE GENERATOR (MASTER) MODEL EH107
1
1 LSB code 127 code 128 VOUT
2 timing diagram
MSA660
time
The value of the glitch energy is the sum of the shaded area measured in LSB.ns.
Fig.6 Glitch energy measurement.
1996 Aug 23
10
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
INTERNAL PIN CONFIGURATIONS
TDA8702
handbook, full pagewidth
V CCA
V REF regulation loop
output current generators
REF
AGND
MBC911 - 1
Fig.7 Reference voltage generator decoupling.
handbook, halfpage
V CCA
handbook, halfpage
DGND
D0 to D7, CLK
AGND substrate
MBC908
AGND
MBC910
Fig.8 AGND and DGND.
Fig.9 D7 to D0 and CLK.
1996 Aug 23
11
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
handbook, halfpage
VCCA 75 VOUT
handbook, halfpage
75
VCCD
VOUT
DGND
MBC907
AGND bit n bit n
MBC909 - 1
switches and current generators
Fig.10 Digital supply.
Fig.11 Analog outputs.
handbook, halfpage
VCCA
AGND
MBC906
Fig.12 Analog supply.
1996 Aug 23
12
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
APPLICATION INFORMATION Additional application information will be supplied upon request (please quote number FTV/8901).
TDA8702
handbook, halfpage nF (1) 100
REF AGND
VCCA VOUT VOUT VO
TDA8702/ TDA8702T
MSA661
(1) This is a recommended value for decoupling pin 1.
Fig.13 Analog output voltage without external load (VO = -VOUT; see Table 1, ZL = 10 k).
handbook, full pagewidth
100 nF
(1)
REF AGND
VCCA ZL VOUT VO Z L / ( Z L 75 )
TDA8702/ TDA8702T
MSA662
(1) This is a recommended value for decoupling pin 1.
Fig.14 Analog output voltage with external load (external load ZL = 75 to ).
1996 Aug 23
13
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
handbook, halfpage (1) 100 nF
REF 100 F AGND VOUT
VCCA
75 TDA8702/ TDA8702
VO 2
MSA663
AGND
(1) This is a recommended value for decoupling pin 1.
Fig.15 Analog output with AGND as reference.
handbook, full pagewidth
TDA8702
V OUT (pin 15) or V OUT (pin 14) 100 F 390
10 H
12 H
27 pF
12 pF 390
39 pF
100 pF
56 pF
Vo [390/(780+75)]
MSA665
Fig.16 Example of anti-aliasing filter (analog output referenced to AGND).
1996 Aug 23
14
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
handbook, halfpage
0
MSA657
(dB) 20
40
60
80
100 0 Characteristics Order 5; adapted CHEBYSHEV. Ripple at 0.1 dB. f(-3 dB) = 6.7 MHz. f(NOTCH) = 9.7 MHz and 13.3 MHz. 10 20 30 f i (MHz) 40
Fig.17 Frequency response for filter shown in Fig.16.
handbook, full pagewidth
100 nF
(1)
REF 100 F AGND VOUT VOUT 100 F TDA8702/ TDA8702T R2 R1 R1
R2
2 X VO (R2/R1)
AGND
MSA664
(1) This is a recommended value for decoupling pin 1.
Fig.18 Differential mode (improved supply voltage ripple rejection).
1996 Aug 23
15
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
PACKAGE OUTLINES DIP16: plastic dual in-line package; 16 leads (300 mil); long body
TDA8702
SOT38-1
D seating plane
ME
A2
A
L
A1
c Z e b1 b 16 9 MH wM (e 1)
pin 1 index E
1
8
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.7 0.19 A1 min. 0.51 0.020 A2 max. 3.7 0.15 b 1.40 1.14 0.055 0.045 b1 0.53 0.38 0.021 0.015 c 0.32 0.23 0.013 0.009 D (1) 21.8 21.4 0.86 0.84 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.10 e1 7.62 0.30 L 3.9 3.4 0.15 0.13 ME 8.25 7.80 0.32 0.31 MH 9.5 8.3 0.37 0.33 w 0.254 0.01 Z (1) max. 2.2 0.087
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT38-1 REFERENCES IEC 050G09 JEDEC MO-001AE EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-10-02 95-01-19
1996 Aug 23
16
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
SO16: plastic small outline package; 16 leads; body width 7.5 mm
SOT162-1
D
E
A X
c y HE vMA
Z 16 9
Q A2 A1 pin 1 index Lp L 1 e bp 8 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 10.5 10.1 0.41 0.40 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
0.9 0.4 0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.055 0.394 0.016
8o 0o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT162-1 REFERENCES IEC 075E03 JEDEC MS-013AA EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-01-24 97-05-22
1996 Aug 23
17
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). DIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
TDA8702
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. WAVE SOLDERING Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1996 Aug 23
18
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA8702
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1996 Aug 23
19

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